1. Field of the Invention
The present invention relates to a method for manufacturing a semiconductor device, and particularly to a substrate processing method for forming a shallow trench isolation on a silicon substrate.
2. Description of the Related Art
A LOCOS (Local Oxidation Of Silicon) method is generally used for isolating elements in a semiconductor device. However, the LOCOS method has not been applicable to miniaturization of recent ULSI because corrosion of oxide film (bird's beak) occurs in an element formed area in the LOCOS method and thus the element formed area per unit area is reduced. Therefore, much attention has been recently paid to a shallow trench isolation method for forming a trench in a silicon substrate and then embedding the insulating film in the trench to isolate elements.
A prior art 1 of the shallow trench isolation process will be described with reference to FIG. 7(a) to FIG. 7(f).
As shown in FIG. 7(a), a silicon oxide film 202 of about 10 nm in thickness is formed on the overall surface of a silicon substrate 201, and subsequently a silicon nitride film 203 of about 160 nm in thickness is formed on the silicon oxide film 202. Thereafter, as shown in FIG. 7(b), a photoresist film 205 is formed by a photolithography technique, and the silicon nitride film 203 and the silicon oxide film 202 are subjected to patterning by dry etching by using the photoresist film 205 as a mask. Thereafter, the photoresist film 205 is removed (see FIG. 7(c)), and a trench 206 of about 200 nm is formed in the silicon substrate 201 by dry etching by using the silicon nitride film 203 as a mask (see FIG. 7(d)). Subsequently, a silicon oxide film 207 is formed on the silicon substrate so as to be embedded in the trench 206 by a CVD technique as shown in FIG. 7(e). Furthermore, polishing is carried out by a CMP (Chemical Mechanical Polishing) technique so that the silicon oxide film 207 remains only in the trench 206, and the silicon nitride film 203 and the silicon oxide film 202 are removed by wet etching, thereby forming a shallow trench isolation (see FIG. 7(f)).
The width WSt2 of an element isolating area of the shallow trench isolation formed as shown in FIG. 7(f) is determined by the width WSe2 of the trench 206 formed by dry etching to the silicon substrate 201 by using the silicon nitride film 203 as a mask (see FIG. 7(d)), and the element isolation area has an excellent element isolation characteristic in spite of a narrow area, so that the shallow trench isolation method has mainly prevailed as an element isolation technique best suited to recent miniaturization.
As described above, the width WSt2 of the element isolation area of the shallow trench isolation is determined by the width WSe2 of the trench 206 formed by the dry etching to the silicon substrate 201 by using the silicon nitride film 203 as a mask, so that the processing precision of the silicon nitride film 203 used as a mask is important to form the shallow trench isolation with high precision. Furthermore, when the integration degree of elements is enhanced in the future, it will be required to reduce the width of the element isolation area, and in order to satisfy this requirement, it is important to form the trench 206 at an extremely narrow width. Specifically, it is required (1) to vertically process silicon nitride film without being dependent on pattern density, (2) to process silicon nitride film so that the width thereof is smaller than the pattern interval width of a photoresist film when there is a limit to the pattern interval width of the photoresist film formed by the photolithography technique, and (3) to process silicon nitride film so that no exfoliation residual of the photoresist film occurs.
Here, the limitation of the pattern interval width of the photoresist film in the above-described (2) means a limiting resolution width (limiting resolving power) of the photolithography technique, and it is represented by the following equation: R=k1×λ/NA on the optical principle when the limiting resolution width is represented by R. Here, λ represents the wavelength of an optical source of photolithography, NA represents a numerical aperture of a projection lens, and k1 represents a value determined by the resolving power of the resist material itself and the controllability of the process. NA and λ are varied in accordance with an exposure apparatus being used. In the case of an ArF exposing machine which is a leading-edge exposing machine, when the calculation is carried out under the condition that λ is set to 193 nm, NA is set to 0.70, and k1 is set to 0.40, R=0.40×193 nm/0.70=110 nm.
A prior art 2 is disclosed as a countermeasure for the above-described (1) in Japanese Published Unexamined Patent Application No. 2000-235969. Steps until a patterning step of a silicon nitride film in the prior art 2 are shown in FIG. 8(a) to FIG. 8(d), and the same elements as FIG. 7 are represented by the same symbols. FIG. 8(a) shows a state where the silicon oxide film 202 and the silicon nitride film 203 are successively laminated on the silicon substrate 201, FIG. 8(b) shows a state where the photoresist film 205 is formed on the silicon nitride film 203 by patterning, FIG. 8(c) shows a state where the silicon nitride film is dry-etched by using the photoresist film 205 as a mask, and FIG. 8(d) shows a state where the photoresist film is removed. According to the prior art 2, O2 is added to CF4/CHF3/Ar gas so that a fluorocarbon polymer occurring in the dry etching step by oxygen radicals is prevented from adhering to a pattern side wall, whereby the silicon nitride film can be vertically dry-etched with little pattern-dependence.
However, in the prior art 2, the photoresist film 205 retrogresses by the amount corresponding to the dimension CD3 (=(WLd3−WLd3′)/2=about 2 to 5 nm) because O2 is added to etching gas. As a result, the pattern interval WSe3 of the silicon nitride film after the dry etching is broader than the pattern interval WSd3 (see FIG. 8(b)) of the photoresist film 205 before the dry etching, and thus the above-described (2) is not satisfied.
Furthermore, Japanese Published Unexamined Patent Application No. 2000-235969 discloses a prior art 3 as a countermeasure to the prior art 2. FIG. 9(a) to FIG. 9(e) show steps until a patterning step of the silicon nitride film in the prior art 3, and the same elements as FIG. 7 are represented by the same symbols. FIG. 9(a) shows a state where the silicon oxide film 202 and the silicon nitride film 203 are successively formed on the silicon substrate 201, FIG. 9(b) shows a state where the photoresist film 205 is formed on the silicon nitride film 203 by patterning, FIG. 9(c) shows a state where ion implantation is applied to the surface of the photoresist film 205, FIG. 9(d) shows a state where the silicon nitride film is dry-etched by using the photoresist film 205 as a mask after the ion implantation, and FIG. 9(e) shows a state where the photoresist film is removed. According to the prior art 2, as shown in FIG. 9(c), a cured layer is formed on the photoresist film 205 by doping ions 210 into the surface of the photoresist film 205, thereby enhancing the resistance to oxygen radicals. Therefore, retrogression of the photoresist film during the dry-etching of the silicon nitride film 203 can be prevented.
However, in the prior art 3, it is difficult to exfoliate the photoresist film 205b after the silicon nitride film 203 is dry-etched because the cured layer 205a is formed by doping ions into the photoresist film 205, and further there is a problem that oxide-based residual 211 comprising doped ions and oxygen atoms occurs after the exfoliation.
Japanese Published Unexamined Patent Application No. 2001-93970 discloses another prior art 4. FIG. 10(a) to FIG. 10(d) show steps until a patterning step of the silicon nitride film in the prior art 4, and the same elements as FIG. 7 are represented by the same symbols. FIG. 10(a) shows a state where the silicon oxide film 202 and the silicon nitride film 203 are successively laminated on the silicon substrate 201, FIG. 10(b) shows a state where the photoresist film 205 is formed on the silicon nitride film 203 by patterning, FIG. 10(c) shows a state where a trench having tapered side surfaces are formed in the silicon nitride film by dry etching by using the photoresist film as a mask, and FIG. 10(d) shows a state where a trench is formed by dry-etching the silicon substrate with the silicon nitride film being used as a mask.
According to the prior art 4, by increasing RF power or reducing a dry-etching gas flow-rate ratio (CF4/CHF3) when the silicon nitride film 203 is dry-etched, the silicon nitride film 203 is subjected to trench processing to have a tapered shape, so that the pattern interval WSe5 (see FIG. 10(c)) can be made smaller than the pattern interval WSd5 (see FIG. 10(b)) of the photoresist film. However, the silicon nitride film 203 is processed to have a tapered shape, and thus the tapered side surfaces of the trench of the silicon nitride film 203 serving as a mask when trench-etched in the silicon substrate 201 retrogresses during the trench etching. As a result, the pattern interval WSt5 after the trench etching of the silicon substrate 201 is larger than the pattern interval WSe5 before the trench etching.